Staff Engineer II, Design

Staff Engineer II, Design

Santa Clara, CA

Responsibilities:

Analysis and design of Analog & RF building blocks in CMOS technologies. Experimental verification and debugging. Integration of complex RF & Mixed Signal functions into system chips. Understand and interpret specs. Translate specs to circuit requirement. Make intelligent trade-offs amongst power, area, and performance. Run simulations and do layout design. Characterization of silicon. Participate in system level architectural design of broadband communications SoCs. Do "hard-core" Analog circuit design Verification and extraction. Experimental verification in a lab environment. ATE bring-up Debug and support of field returns.

Requirements:

M.Sc./Ph.D in Electrical Engineering or equivalent education. M.SC. with six years of experience or PhD with three years experience is required. Experienced in Cadence design environment. Able to make system level judgment and associated trade-offs. Ability to manage a complex mixed signal chip development from creation into high-volume production. Strong grasp of low noise, high linearity design. Interest in continuous time sigma delta converters. Interest in high resolution, high bandwidth AD converters and 16 bit linear DACs line drivers. Have knowledge of active filter design implementation. Design environment/experience with CAD tools. System level design tools (e.g. MatLab). Transistor level design (Cadence Analog artist). Layout tools (Cadence Virtuoso) Verification/extraction. Experimental verification/ATE support Experience with documentation. Good ommunication skills. Able to work in a team environment.